Innovative Architecture for Future Generation High-Performance Processors and Systems (Cat. No.PR00650) /

Annotation Contains 11 papers presented at the November 1999 workshop that discussed computer architecture, compilers, and applications for high- performance systems. Some of the topics are near fine grain parallel processing using static scheduling on single ship multiprocessors, PIM architectures...

Ausführliche Beschreibung

Gespeichert in:
Körperschaft:
Institute of Electrical and Electronics Engineers
Format:
Elektronisch E-Book
Sprache:
Englisch
Veröffentlicht:
Los Alamitos, Calif. : IEEE Computer Society, 2000.
Zusammenfassung:
Annotation Contains 11 papers presented at the November 1999 workshop that discussed computer architecture, compilers, and applications for high- performance systems. Some of the topics are near fine grain parallel processing using static scheduling on single ship multiprocessors, PIM architectures to support petaflops-level computation in the HTMT machine, evaluation of compiler-assisted software DSM schemes for a workstation cluster, and a heuristic approach to improve a branch and bound based program partitioning algorithm. No subject index. Annotation copyrighted by Book News, Inc., Portland, OR.
Umfang:
1 online resource (viii, 115 pages) : illustrations
Bibliografie:
Includes bibliographical references.
Schlagworte:
Bezugswerke: