Innovative Architecture for Future Generation High-Performance Processors and Systems: Postproceedings, 1998 International Workshop

A selection of 14 of the 19 papers presented at the workshop cover measuring, understanding, and optimizing application and system performance; prediction and speculative execution; interactions between hardware and software in architecture design; compilation; and parallel system architecture. Spec...

Ausführliche Beschreibung

Gespeichert in:
1. Verfasser:
Veidenbaum, Alex
Körperschaften:
Maui High-Performance Computing Center Staff (Content Provider), International Workshop on Innovative Architecture
Weitere Verfasser:
Joe, Kazuki (MitwirkendeR)
Format:
Tagungsbericht Elektronisch E-Book
Sprache:
Englisch
Veröffentlicht:
[Place of publication not identified] IEEE Computer Society Press 1999
Zusammenfassung:
A selection of 14 of the 19 papers presented at the workshop cover measuring, understanding, and optimizing application and system performance; prediction and speculative execution; interactions between hardware and software in architecture design; compilation; and parallel system architecture. Specific topics include system support for the dynamic optimization of application performance, a speculative multi-threading with selective multi-path execution, new methods for exploiting program structure and behavior in computer architecture, implementing a non-strict functional programming language V on a threaded architecture EARTH, and the architecture of a parallel computer Cenju-4. Only authors are indexed. Annotation copyrighted by Book News, Inc., Portland, OR.
Umfang:
1 online resource (180 pages) : illustrations
Anmerkungen:
Bibliographic Level Mode of Issuance: Monograph
Anmerkungen:
English
Schlagworte:
Computer architecture > Congresses.
Microprocessors > Congresses.
Bezugswerke: